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? semiconductor components industries, llc, 2013 april, 2013 ? rev. 15 1 publication order number: ncv4274/d ncv4274, ncv4274a 400 ma 2% and 4%voltage regulator family description the ncv4274 and ncv4274a is a precision micro ? power voltage regulator with an output current capability of 400 ma available in the dpak, d2pak and sot ? 223 packages. the output voltage is accurate within 2.0% or 4.0% depending on the version with a maximum dropout voltage of 0.5 v with an input up to 40 v. low quiescent current is a feature drawing only 150 a with a 1 ma load. this part is ideal for automotive and all battery operated microprocessor equipment. the regulator is protected against reverse battery, short circuit, and thermal overload conditions. the device can withstand load dump transients making it suitable for use in automotive environments. features ? 2.5, 3.3 v, 5.0 v, 8.5 v, 2.0% output options ? 2.5, 3.3 v, 5.0 v, 4.0% output options ? low 150 a quiescent current at 1 ma load current ? 400 ma output current capability ? fault protection ? +60 v peak transient voltage with respect to gnd ? 42 v reverse voltage short circuit thermal overload ? very low dropout voltage ? ncv prefix for automotive and other applications requiring unique site and control change requirements; aec ? q100 qualified and ppap capable ? these are pb ? free devices marking diagrams dpak dt suffix case 369c d2pak ds suffix case 418af see detailed ordering and shipping information in the package dimensions section on page 15 of this data sheet. ordering information http://onsemi.com 74x ? xxg alyww x x = a or blank xx = voltage ratings a = assembly location l, wl = wafer lot y = year ww, w = work week g, = pb ? free package 4 1 2 3 4 123 1 input 2, 4 ground 3 output 1 input 2, 4 ground 3 output sot ? 223 st suffix case 318e 1 ayw 74x ? xx 1 input 2, 4 ground 3 output 23 4 nc v4274x ? xx awlywwg (*note: microdot may be in either location)
ncv4274, ncv4274a http://onsemi.com 2 figure 1. block diagram ? + bandgap refernece thermal shutdown current limit and saturation sense gnd q i pin definitions and functions pin no. symbol function 1 i input; bypass directly at the ic a ceramic capacitor to gnd. 2,4 gnd ground 3 q output; bypass with a capacitor to gnd. 1. dpak 3ld package code 6025 2. d2pak 3ld package code 6083 absolute maximum ratings pin symbol, parameter symbol condition min max unit i , input ? to ? regulator voltage v i ? 42 45 v current i i internally limited internally limited i , input peak transient voltage to regulator with respect to gnd v i 60 v q, regulated output voltage v q v q = v i ? 1.0 40 v current i q internally limited internally limited gnd, ground current i gnd ? 100 ma junction temperature storage temperature t j t stg ? ? 50 150 150 c c esd capability, human body model esd hb 4 kv esd capability, machine model esd mm 200 v esd capability, charged device model esd cdm 1 kv stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 3. this device series incorporates esd protection and is tested by the following methods: esd hbm tested per aec ? q100 ? 002 (eia/jesd22 ? a114) esd mm tested per aec ? q100 ? 003 (eia/jesd22 ? a115) esd cdm tested per eia/jes d22/c101, field induced charge model
ncv4274, ncv4274a http://onsemi.com 3 operating range parameter symbol condition min max unit input voltage (8.5 v version) v i 9.0 40 v input voltage (5.0 v version) v i 5.5 40 v input voltage (3.3 v, and 2.5 v version) v i 4.5 40 v junction temperature t j ? 40 150 c thermal resistance parameter symbol condition min max unit junction ? to ? ambient dpak r thja ? 70 (note 4) c/w junction ? to ? ambient d2pak r thja ? 60 (note 4) c/w junction ? to ? case dpak r thjc ? 4 c/w junction ? to ? case d2pak r thjc ? 3 c/w junction ? to ? ta b sot ? 223 ? jlx, lx ? 14.5 (note 5) c/w junction ? to ? ambient sot ? 223 r ja , ja ? 169.7 (note 5) c/w 4. soldered in, minimal footprint, fr4 5. 1 oz copper, 5 mm 2 copper area, fr4 lead free soldering temperature and msl parameter symbol condition min max unit lead free soldering, (note 6) reflow (smd styles only), pb ? free t sld 60s ? 150s above 217s 40s max at peak ? 265 pk c moisture sensitivity level msl dpak and d2pak sot ? 223 1 3 ? ? 6. per ipc/jedec j ? std ? 020c
ncv4274, ncv4274a http://onsemi.com 4 electrical characteristics ? 40 c < t j < 150 c; v i = 13.5 v unless otherwise noted. parameter symbol test conditions min typ max min typ max unit ncv4274a ncv4274 regulator output voltage (8.5 v version) v q 5 ma < i q < 200 ma 9.5 v < v i < 40 v 8.33 8.5 8.67 ? ? ? v output voltage (8.5 v version) v q 5 ma < i q < 400 ma 9.5 v < v i < 28 v 8.33 8.5 8.67 ? ? ? v output voltage (5.0 v version) v q 5 ma < i q < 400 ma 6 v < v i < 28 v 4.9 5.0 5.1 4.8 5.0 5.2 v output voltage (5.0 v version) v q 5 ma < i q < 200 ma 6 v < v i < 40 v 4.9 5.0 5.1 4.8 5.0 5.2 v output voltage (3.3 v version) v q 5 ma < i q < 400 ma 4.5 v < v i < 28 v 3.23 3.3 3.37 3.17 3.3 3.43 v output voltage (3.3 v version) v q 5 ma < i q < 200 ma 4.5 v < v i < 40 v 3.23 3.3 3.37 3.17 3.3 3.43 v output voltage (2.5 v version) v q 5 ma < i q < 400 ma 4.5 v < v i < 28 v 2.45 2.5 2.55 2.4 2.5 2.6 v output voltage (2.5 v version) v q 5 ma < i q < 200 ma 4.5 v < v i < 40 v 2.45 2.5 2.55 2.4 2.5 2.6 v current limit i q ? 400 600 ? 400 600 ? ma quiescent current i q i q = 1 ma v q = 8.5 v v q = 5.0 v v q = 3.3 v v q = 2.5 v i q = 250 ma v q = 8.5 v v q = 5.0 v v q = 3.3 v v q = 2.5 v i q = 400 ma v q = 8.5 v v q = 5.0 v v q = 3.3 v v q = 2.5 v ? ? ? ? ? ? ? ? ? ? ? ? 195 190 145 140 10 10 13 12 20 20 30 28 250 250 250 250 15 15 20 20 35 35 45 45 ? ? ? ? ? ? ? ? ? ? ? ? ? 190 145 140 ? 10 13 12 ? 20 30 28 ? 250 250 250 ? 15 20 20 ? 35 45 45 a a a a ma ma ma ma ma ma ma ma dropout voltage 8.5 v version 5.0 v version 3.3 v version 2.5 v version v dr i q = 250 ma, v dr = v i ? v q v i = 8.5 v v i = 5.0 v v i = 4.5 v v i = 4.5 v ? ? ? ? 250 250 ? ? 500 500 1.27 2.05 ? ? ? ? ? 250 ? ? ? 500 1.33 2.1 mv mv v v load regulation v q i q = 5 ma to 400 ma ? 7 20 ? 7 30 mv line regulation v q v i = 12 v to 32 v i q = 5 ma ? 10 25 ? 10 25 mv power supply ripple rejection p srr ?r = 100 hz, v r = 0.5 v pp ? 60 ? ? 60 ? db temperature output voltage drift v q / t ? 0.5 ? ? 0.5 ? mv/k thermal shutdown temperature* t sd i q = 5 ma 165 ? 210 165 ? 210 c *guaranteed by design, not tested in production
ncv4274, ncv4274a http://onsemi.com 5 figure 2. measuring circuit ncv4274 ncv4274a r load v q c q 10 f or 22 f c 12 100 nf c 11 1.0 f v q i q q i i i v i v i i gnd gnd 13 2,4 figure 3. application circuit output c q * c i 100 nf gnd ncv4274 ncv4274a 13 2,4 input v q v i *c q = 10 f for v q 3.3 v c q = 22 f for v q 5 v typical characteristic curves figure 4. esr characterization ? 3.3 v, 5 v and 8.5 v versions 0.01 0.1 1 10 100 0 50 100 150 200 250 esr ( ) load current (ma) maximum esr c out = 10 f ? 100 f 300 350 400 stable region v i = 13.5 v figure 5. esr characterization ? 2.5 v version 0.1 1.0 10 100 1000 0 5 20 60 100 140 esr ( ) load current (ma) maximum esr c out = 1 f ? 100 f 180 220 260 300 340 380 420 minimum esr c out = 1 f stable region v i = 13.5 v
ncv4274, ncv4274a http://onsemi.com 6 typical characteristic curves ? 8.5 v version 8.3 8.4 8.5 8.6 8.7 ? 40 0 40 80 120 160 v q (v) t j ( c) 0 1 2 3 4 5 6 02 46 810 r l = 33 t j = 25 c v i = 13.5 v r l = 1.7 k v q (v) v i (v) figure 6. output voltage vs. junction temperature 0 200 400 600 1000 0 1020304050 i q (ma) v i (v) figure 7. output voltage vs. input voltage t j = 25 c v q = 0 v 0 5 10 15 20 25 35 0 100 200 300 400 50 0 i q (ma) i q (ma) figure 8. output current vs. input voltage t j = 25 c v i = 13.5 v 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0102030405060 i q (ma) i q (ma) t j = 25 c v i = 13.5 v figure 9. current consumption vs. output current (high load) figure 10. current consumption vs. output current (low load) figure 11. drop voltage vs. output current 0 100 200 300 400 500 600 0 100 200 300 400 v dr (mv) i q (ma) t j = 25 c t j = 125 c 7 8 9 10 800 30 v i = 13.5 v
ncv4274, ncv4274a http://onsemi.com 7 typical characteristic curves ? 8.5 v version 0 10 20 30 50 0 1020304050 r l = 33 t j = 25 c i q (ma) v i (v) ? 16 ? 14 ? 12 ? 10 ? 8 ? 6 ? 4 ? 2 0 2 4 6 ? 50 ? 30 ? 10 30 50 r l = 6.8 k t j = 25 c i i (ma) v i (v) figure 12. current consumption vs. input voltage figure 13. input current vs. input voltage 40 10
ncv4274, ncv4274a http://onsemi.com 8 typical characteristic curves ? 5.0 v version 4.8 4.9 5.0 5.1 5.2 ? 40 0 40 80 120 160 v q (v) t j ( c) 0 1 2 3 4 5 6 02 46 810 r l = 20 t j = 25 c v i = 13.5 v r l = 1 k v q (v) v i (v) figure 14. output voltage vs. junction temperature 0 200 400 600 800 0 1020304050 i q (ma) v i (v) figure 15. output voltage vs. input voltage t j = 25 c v q = 0 v 0 10 20 30 40 50 60 0 100 200 300 400 500 600 i q (ma) i q (ma) figure 16. output current vs. input voltage t j = 25 c v i = 13.5 v 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0102030405060 i q (ma) i q (ma) t j = 25 c v i = 13.5 v figure 17. current consumption vs. output current (high load) figure 18. current consumption vs. output current (low load) figure 19. drop voltage vs. output current 0 100 200 300 400 500 600 0 100 200 300 400 v dr (mv) i q (ma) t j = 25 c t j = 125 c
ncv4274, ncv4274a http://onsemi.com 9 typical characteristic curves ? 5.0 v version 0 10 20 30 40 0 1020304050 r l = 20 t j = 25 c i q (ma) v i (v) ? 16 ? 14 ? 12 ? 10 ? 8 ? 6 ? 4 ? 2 0 2 4 6 ? 50 ? 25 0 25 50 r l = 6.8 k t j = 25 c i i (ma) v i (v) figure 20. current consumption vs. input voltage figure 21. input current vs. input voltage
ncv4274, ncv4274a http://onsemi.com 10 typical characteristic curves ? 3.3 v version 2.9 3.0 3.1 3.4 3.5 ? 40 0 40 80 120 160 v q (v) t j ( c) 0 1 2 3 4 5 6 01 34 5 6 r l = 20 t j = 25 c v i = 6 v r l = 1 k v q (v) v i (v) figure 22. output voltage vs. junction temperature 0 200 400 600 800 0 1020304050 i q (ma) v i (v) figure 23. output voltage vs. input voltage t j = 25 c v q = 0 v 0 10 20 30 40 50 60 0 100 200 300 400 500 600 i q (ma) i q (ma) figure 24. output current vs. input voltage t j = 25 c v i = 13.5 v 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0102030405060 i q (ma) i q (ma) t j = 25 c v i = 13.5 v figure 25. current consumption vs. output current (high load) figure 26. current consumption vs. output current (low load) figure 27. voltage drop vs. output current 1.14 1.16 1.18 1.20 1.22 1.24 1.26 0 100 200 300 400 v dr (v) i q (ma) t j = 25 c t j = 125 c 3.2 3.3 2 v dr = v i(min) ? v q
ncv4274, ncv4274a http://onsemi.com 11 typical characteristic curves ? 3.3 v version 0 1 4 5 7 01020304050 r l = 20 t j = 25 c i q (ma) v i (v) ? 16 ? 14 ? 12 ? 10 ? 8 ? 6 ? 4 ? 2 0 2 4 ? 50 ? 25 0 25 50 r l = 3.3 k t j = 25 c i i (ma) v i (v) figure 28. current consumption vs. input voltage figure 29. input current vs. input voltage 2 3 6
ncv4274, ncv4274a http://onsemi.com 12 typical characteristic curves ? 2.5 v version 2.1 2.2 2.3 2.6 2.7 ? 40 0 40 80 120 160 v q (v) t j ( c) 0 1.0 2.0 3.0 4.0 4.5 5.0 01 34 5 6 v i = 6 v r l = 1 k v q (v) v i (v) figure 30. output voltage vs. junction temperature 0 200 400 600 800 0 1020304050 i q (ma) v i (v) figure 31. output voltage vs. input voltage t j = 25 c v q = 0 v 0 10 20 30 40 50 60 0 100 200 300 400 500 600 i q (ma) i q (ma) figure 32. output current vs. input voltage t j = 25 c v i = 13.5 v 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0102030405060 i q (ma) i q (ma) t j = 25 c v i = 13.5 v figure 33. current consumption vs. output current (high load) figure 34. current consumption vs. output current (low load) figure 35. voltage drop vs. output current 1.95 1.96 1.97 2.00 2.02 2.03 2.05 0 100 200 300 400 v dr (v) i q (ma) t j = 25 c t j = 125 c 2.4 2.5 2 v dr = v i(min) ? v q 3.5 0.5 1.5 2.5 1.98 1.99 2.01 2.04
ncv4274, ncv4274a http://onsemi.com 13 typical characteristic curves ? 2.5 v version 0 0.5 2.5 3.0 4.5 01020304050 r l = 20 t j = 25 c i q (ma) v i (v) ? 14 ? 12 ? 10 ? 8 ? 6 ? 4 ? 2 0 2 ? 50 ? 25 0 25 50 r l = 3.3 k t j = 25 c i i (ma) v i (v) figure 36. current consumption vs. input voltage figure 37. input current vs. input voltage 1.0 1.5 4.0 2.0 3.5
ncv4274, ncv4274a http://onsemi.com 14 application description output regulator the output is controlled by a precision trimmed reference and error amplifier. the pnp output has saturation control for regulation while the input voltage is low , preventing over saturation. current limit and voltage monitors complement the regulator design to give safe operating signals to the processor and control circuits. stability considerations the input capacitor c i1 in figure 2 is necessary for compensating input line reactance. possible oscillations caused by input inductance and input capacitance can be damped by using a resistor of approximately 1 in series with c i2. the output or compensation capacitor helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. the capacitor value and type should be based on cost, availability, size and temperature constraints. the aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures ( ? 25 c to ? 40 c), both the value and esr of the capacitor will vary considerably. the capacitor manufacturer?s data sheet usually provides this information. the value for the output capacitor c q shown in figure 2 should work for most applications; however, it is not necessarily the optimized solution. stability is guaranteed at values c q 2.2 f and an esr 2.5 within the operating temperature range. actual limits are shown in a graph in the typical performance characteristics section. calculating power dissipation in a single output linear regulator the maximum power dissipation for a single output regulator (figure 3) is: p d(max) [v i(max) v q(min) ]i q(max) v i(max) i q (eq. 1) where: v i(max) is the maximum input voltage, v q(min) is the minimum output voltage, i q(max) is the maximum output current for the application, and i q is the quiescent current the regulator consumes at i q(max) . once the value of p d(max) is known, the maximum permissible value of r ja can be calculated: p ja 150 c t a p d (eq. 2) the value of r ja can then be compared with those in the package section of the data sheet. those packages with r ja ?s less than the calculated value in equation 2 will keep the die temperature below 150 c. in some cases, none of the packages will be sufficient to dissipate the heat generated by the ic, and an external heat sink will be required. the current flow and voltages are shown in the measurement circuit diagram. heat sinks a heat sink effectively increases the surface area of the package to improve the flow of heat away from the ic and into the surrounding air. each material in the heat flow path between the ic and the outside environment will have a thermal resistance. like series electrical resistances, these resistances are summed to determine the value of r ja : r ja r jc r cs r sa (eq. 3) where: r jc = the junction ? to ? case thermal resistance, r cs = the case ? to ? heat sink thermal resistance, and r sa = the heat sink ? to ? ambient thermal resistance. r jc appears in the package section of the data sheet. like r ja , it too is a function of package type. r cs and r sa are functions of the package type, heat sink and the interface between them. these values appear in data sheets of heat sink manufacturers. thermal, mounting, and heat sinking are discussed in the on semiconductor application note an1040/d, available on the on semiconductor website.
ncv4274, ncv4274a http://onsemi.com 15 ordering information4 device output voltage accuracy output voltage package shipping ? ncv4274ads85r4g 2% 8.5 v d2pak (pb ? free) 800 / tape & reel ncv4274ds50g 4% 5.0 v d2pak (pb ? free) 50 units / rail ncv4274ds50r4g 4% 5.0 v d2pak (pb ? free) 800 / tape & reel ncv4274dt50rkg 4% 5.0 v dpak (pb ? free) 2500 / tape & reel ncv4274ads50g 2% 5.0 v d2pak (pb ? free) 50 units / rail ncv4274ads50r4g 2% 5.0 v d2pak (pb ? free) 800 / tape & reel ncv4274adt50rkg 2% 5.0 v dpak (pb ? free) 2500 / tape & reel ncv4274st33t3g 4% 3.3 v sot ? 223 (pb ? free) 4000 / tape & reel ncv4274dt33rkg 4% 3.3 v dpak (pb ? free) 2500 / tape & reel ncv4274ast33t3g 2% 3.3 v sot ? 223 (pb ? free) 4000 / tape & reel ncv4274adt33rkg 2% 3.3 v dpak (pb ? free) 2500 / tape & reel NCV4274ADS33R4G 2% 3.3 v d2pak (pb ? free) 800 / tape & reel ncv4274st25t3g 4% 2.5 v sot ? 223 (pb ? free) 4000 / tape & reel ncv4274ast25t3g 2% 2.5 v sot ? 223 (pb ? free) 4000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ncv4274, ncv4274a http://onsemi.com 16 package dimensions sot ? 223 (to ? 261) case 318e ? 04 issue n 1.5 0.059 mm inches scale 6:1 3.8 0.15 2.0 0.079 6.3 0.248 2.3 0.091 2.3 0.091 2.0 0.079 soldering footprint* *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. a1 b1 d e b e e1 4 123 0.08 (0003) a l1 c notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inch. h e dim a min nom max min millimeters 1.50 1.63 1.75 0.060 inches a1 0.02 0.06 0.10 0.001 b 0.60 0.75 0.89 0.024 b1 2.90 3.06 3.20 0.115 c 0.24 0.29 0.35 0.009 d 6.30 6.50 6.70 0.249 e 3.30 3.50 3.70 0.130 e 2.20 2.30 2.40 0.087 0.85 0.94 1.05 0.033 0.064 0.068 0.002 0.004 0.030 0.035 0.121 0.126 0.012 0.014 0.256 0.263 0.138 0.145 0.091 0.094 0.037 0.041 nom max l1 1.50 1.75 2.00 0.060 6.70 7.00 7.30 0.264 0.069 0.078 0.276 0.287 h e ? ? e1 0 1 0 0 1 0 l l 0.20 ??? ??? 0.008 ??? ???
ncv4274, ncv4274a http://onsemi.com 17 package dimensions dpak (single gauge) case 369c issue d b d e b3 l3 l4 b2 e m 0.005 (0.13) c c2 a c c z dim min max min max millimeters inches d 0.235 0.245 5.97 6.22 e 0.250 0.265 6.35 6.73 a 0.086 0.094 2.18 2.38 b 0.025 0.035 0.63 0.89 c2 0.018 0.024 0.46 0.61 b2 0.030 0.045 0.76 1.14 c 0.018 0.024 0.46 0.61 e 0.090 bsc 2.29 bsc b3 0.180 0.215 4.57 5.46 l4 ??? 0.040 ??? 1.01 l 0.055 0.070 1.40 1.78 l3 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inches. 3. thermal pad contour optional within di- mensions b3, l3 and z. 4. dimensions d and e do not include mold flash, protrusions, or burrs. mold flash, protrusions, or gate burrs shall not exceed 0.006 inches per side. 5. dimensions d and e are determined at the outermost extremes of the plastic body. 6. datums a and b are determined at datum plane h. 12 3 4 5.80 0.228 2.58 0.102 1.60 0.063 6.20 0.244 3.00 0.118 6.17 0.243 mm inches scale 3:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* h 0.370 0.410 9.40 10.41 a1 0.000 0.005 0.00 0.13 l1 0.108 ref 2.74 ref l2 0.020 bsc 0.51 bsc a1 h detail a seating plane a b c l1 l h l2 gauge plane detail a rotated 90 cw
ncv4274, ncv4274a http://onsemi.com 18 package dimensions d2pak case 418af issue b 5 ref 5 ref v u terminal 4 notes: 3. dimensioning and tolerancing per ansi y14.5m, 1982. 4. controlling dimension: inches. 5. tab contour optional within dimensions a and k. 6. dimensions u and v establish a minimum mounting surface for terminal 4. 7. dimensions a and b do not include mold flash or gate protrusions. mold flash and gate protrusions not to exceed 0.025 (0.635) maximum. 8. single gauge design will be shipped after fpcn expiration in october 2011. dim a min max min max millimeters 0.386 0.403 9.804 10.236 inches b 0.356 0.368 9.042 9.347 c 0.170 0.180 4.318 4.572 d 0.026 0.036 0.660 0.914 e 0.045 0.055 1.143 1.397 f 0.051 ref 1.295 ref g 0.100 bsc 2.540 bsc h 0.539 0.579 13.691 14.707 j 0.125 max 3.175 max k 0.050 ref 1.270 ref l 0.000 0.010 0.000 0.254 m 0.088 0.102 2.235 2.591 n 0.018 0.026 0.457 0.660 p 0.058 0.078 1.473 1.981 r s 0.116 ref 2.946 ref u 0.200 min 5.080 min v 0.250 min 6.350 min a 12 3 k f b j s h d m 0.010 (0.254) t e optional chamfer *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 8.380 2.540 dimensions: millimeters pitch 3x 16.155 1.016 3x 10.490 3.504 bottom view optional constructions top view side view dual gauge bottom view l t p r detail c seating plane 3x g n m construction d c detail c e optional chamfer side view single gauge construction s c detail c t t d e 0.018 0.026 0.457 0.660 s on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. ncv4274/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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